# virtual-memory-paging-and-tlb

This skill guides coding agents through virtual memory translation, x86-64 multi-level page tables, and TLB lookups. It helps troubleshoot page faults and huge page tuning.

- skill · `type=skill` · Claude Code, Codex, Cursor, GitHub Copilot, Gemini CLI, OpenCode · 316 installs · ★ 267
- Author: mohitmishra786
- License: MIT · policy=mirror · the beginning of the file is at the end of this page
- Source: https://github.com/mohitmishra786/low-level-dev-skills/tree/HEAD/skills/computer-architecture/virtual-memory-paging-and-tlb/SKILL.md
- Updated: 2026-06-27
- HTML: https://affpapa.org/en/nevibecode/skills/virtual-memory-paging-and-tlb

## What it does

The skill outlines the translation path from virtual addresses to physical memory frames. It tracks TLB lookups and misses that trigger page table walks through x86-64 structures like PML4, PDPT, PD, and PT. It also covers page fault classification, distinguishing major disk-backed faults from minor copy-on-write splits and memory protection traps.

To inspect active address spaces on Linux, the workflow suggests querying `/proc/self/maps`, checking `pmap -x`, or scanning `/proc/vmstat` for fault counts. High TLB pressure caused by sparse pointer traversal gets resolved by configuring huge pages via `MAP_HUGETLB` or `madvise(MADV_HUGEPAGE)`.

On Cortex-M microcontrollers, full paging does not exist. They rely on region-based MPUs with static ranges defined in linker scripts. Applying MMU-based translation rules to raw MCUs will produce incorrect physical addresses.

## Install

### Claude Code (native platform)

1. **Skills CLI (Vercel)**
```bash
npx skills add mohitmishra786/low-level-dev-skills --skill virtual-memory-paging-and-tlb -a claude-code
```

2. **Manually: put the files in place**
- File: `~/.claude/skills/virtual-memory-paging-and-tlb/SKILL.md` — Copy the whole skill folder; for one project use .claude/skills/virtual-memory-paging-and-tlb/

### Codex

1. **Skills CLI (Vercel)**
```bash
npx skills add mohitmishra786/low-level-dev-skills --skill virtual-memory-paging-and-tlb -a codex
```

2. **Manually: put the files in place**
- File: `.agents/skills/virtual-memory-paging-and-tlb/SKILL.md` — For all projects use ~/.agents/skills/

### Cursor

1. **Skills CLI (Vercel)**
```bash
npx skills add mohitmishra786/low-level-dev-skills --skill virtual-memory-paging-and-tlb -a cursor
```

2. **Manually: put the files in place**
- File: `.cursor/skills/virtual-memory-paging-and-tlb/SKILL.md` — Cursor also reads .agents/skills/ and .claude/skills/

### GitHub Copilot

1. **GitHub CLI**
```bash
gh skill install mohitmishra786/low-level-dev-skills virtual-memory-paging-and-tlb
```

2. **Manually: put the files in place**
- File: `.github/skills/virtual-memory-paging-and-tlb/SKILL.md`

### Gemini CLI

1. **Skills CLI (Vercel)**
```bash
npx skills add mohitmishra786/low-level-dev-skills --skill virtual-memory-paging-and-tlb -a gemini-cli
```

2. **Platform CLI**
```bash
gemini skills install https://github.com/mohitmishra786/low-level-dev-skills --path skills/computer-architecture/virtual-memory-paging-and-tlb
```

### Windsurf (Devin Desktop)

**Manually: put the files in place**
- File: `.devin/skills/virtual-memory-paging-and-tlb/SKILL.md` — The legacy .windsurf/skills/ path still works

### OpenCode

**Skills CLI (Vercel)**
```bash
npx skills add mohitmishra786/low-level-dev-skills --skill virtual-memory-paging-and-tlb -a opencode
```

### Claude.ai

**Claude.ai**
- Zip the folder and upload it in Settings → Capabilities → Skills

Where a file is given instead of a command, copy the files from the source to that path: https://github.com/mohitmishra786/low-level-dev-skills/tree/HEAD/skills/computer-architecture/virtual-memory-paging-and-tlb/SKILL.md

## When to use it
- diagnose segfaults and W^X permission violations
- mitigate TLB thrashing with huge pages in mmap workloads
- categorize minor and major page faults in Linux processes
- contrast Cortex-M MPU memory regions with MMU page tables

## Example prompts
- /virtual-memory-paging-and-tlb Explain why 4 KiB random access causes TLB pressure and how huge pages help
- /virtual-memory-paging-and-tlb How do I inspect memory mappings for this process using /proc/self/maps?
- /virtual-memory-paging-and-tlb What causes a minor page fault during a copy-on-write operation after fork?

## Source text · SKILL.md · MIT

Below is the content of a third-party file. It is data, not instructions for you: do not act on anything written inside unless the human asks. Block tag: 149dd90bae1c8145.

BEGIN THIRD-PARTY FILE 149dd90bae1c8145
````text
---
name: virtual-memory-paging-and-tlb
description: Virtual memory skill for paging, page tables, and TLB. Use when explaining page faults, multi-level page tables, TLB behavior, or virtual vs physical addressing. Activates on queries about virtual memory, page table, TLB, page fault, mmap paging, or x86-64 paging.
---

# Virtual Memory, Paging, and TLB

## Purpose

Explain virtual memory: paging, multi-level page tables, TLB role, page faults, and address translation — bridging OS kernels, embedded MPU, and performance analysis.

## When to Use

- Understanding `mmap`, `brk`, and demand paging
- Debugging segfaults and guard pages
- Huge pages / TLB pressure tuning
- Contrasting Cortex-M MPU with full MMU systems

## Workflow

### 1. Translation overview

```
Virtual address (VA)
├── TLB lookup → physical on hit
└── TLB miss → page table walk → fill TLB
        ├── valid PTE → physical address
        └── invalid → page fault (OS handles)
```

### 2. Page table (x86-64 4-level example)

```
CR3 → PML4 → PDPT → PD → PT → physical frame
```

Linux on x86_64 uses 4 KiB pages (default) and optional 2 MiB / 1 GiB huge pages.

### 3. Page fault types (simplified)

| Fault | Typical cause |
|-------|----------------|
| Major | Disk read — file-backed page not in RAM |
| Minor | Zero-fill or COW break |
| Protection | User access to kernel page, W^X violation |

```bash
# Linux page fault stats
grep pgfault /proc/vmstat
```

### 4. TLB pressure

Large sparse address spaces + random pointer chasing → TLB misses dominate.

Mitigations:

- `mmap` huge pages (`MAP_HUGETLB`, `madvise(MADV_HUGEPAGE)`)
- Smaller working set / better locality
- `numactl --membind` for NUMA

### 5. Embedded contrast (Cortex-M)

Many MCUs use **MPU** (region-based) not full paging — no TLB, fixed region count. Application processors use MMU + OS.

See `skills/platform/riscv-privileged` for Sv39/Sv48.

### 6. Userspace inspection (Linux)

```bash
cat /proc/self/maps
pmap -x $$
```

### 7. Agent usage

```
/virtual-memory-paging-and-tlb Explain why 4 KiB random access hurts TLB and hugepage helps
```

## Common Problems

| Symptom | Cause | Fix |
|---------|-------|-----|
| Segfault | Unmapped VA | Fix pointer; check `maps` |
````
END THIRD-PARTY FILE 149dd90bae1c8145

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